Handheld Software Defined Radio System

This project involved the development of a handheld software defined radio platform designed to bring lab grade RF capability into a portable form factor. The RF front end is built around the AD9364 transceiver, supporting a continuous tuning range from 70 MHz to 6 GHz with up to 56 MHz instantaneous bandwidth. The transceiver is directly interfaced to a Xilinx Artix 7 FPGA, where all real time signal processing is implemented, including baseband handling, filtering, and modulation chains. A dedicated DDR3 memory connected to the FPGA provides high bandwidth buffering, enabling sustained data throughput and complex signal processing pipelines without bottlenecks. System control and user interaction are handled by an NXP i.MX8M processor running Linux OS. The processor manages the application layer, user interface, and external communication, while remaining decoupled from time critical processing. High speed communication between the processor and FPGA is achieved over PCIe, forming a clear separation between deterministic and non deterministic domains. The platform integrates LPDDR4 memory, eMMC storage, capacitive touch display over MIPI, and an audio subsystem for input and output. A USB Type C interface provides both battery charging and dual role data connectivity, enabling flexible operation in field environments. The result is a tightly integrated SDR system that combines wideband RF capability, FPGA level performance, and a complete embedded user interface within a handheld device.